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The Pentium Pro from Intel is the first of their sixth-generation CPUs targeted at the consumer and server markets. The processor was relatively unusual in that the Pentium Pro used a unique "on-package cache" arrangement; the processor and the cache were on separate dies in the same package and were connected closely by a full-speed bus. The dies had to be bonded together early in the production process, before testing was possible. This meant that a single, tiny flaw in either die made it necessary to discard the entire assembly, which was one of the reasons for the Pentium Pro's relatively low production yield and high cost. == Pentium Pro (.35 / .50 μm) == * The 150 MHz Pentium Pro processor dies (B0, C0) used a 0.50 μm BiCMOS process. * The 166, 180, and 200 MHz Pentium Pro processor dies (sA0, sA1, sB1) used a 0.35 μm CMOS process. * The sA0 stepping is logically equivalent to the C0 stepping, but on a different manufacturing process. * The 256 KB L2 cache dies (256/α, 256/β) used a 0.50 μm BiCMOS process. * The 512 KB and 1 MB L2 cache dies (512/α, 512/β, 1024/γ) used a 0.35 μm CMOS process. * The 1 MB L2 cache models were implemented with two 512 KB dies plus the processor die * L2 cache on all models was off-die and ran at full CPU speed. * Only the Pentium II Overdrive supports MMX. * The Pentium II Overdrive processor is based on the 0.25 μm Pentium II Deschutes core, with the distinction that its L2 cache runs at full CPU speed, not Deschutes' half CPU speed. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「List of Intel Pentium Pro microprocessors」の詳細全文を読む スポンサード リンク
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